pub const BROADWELL_UNCORE: Map<&'static str, IntelPerformanceCounterDescription> = ::phf::Map{key: 9603444721912725599,
disps: ::phf::Slice::Static(&[(6, 17), (1, 3), (3, 0), (14, 6)]),
entries:
::phf::Slice::Static(&[("UNC_CBO_CACHE_LOOKUP.READ_ES",
IntelPerformanceCounterDescription{event_code:
Tuple::One(52),
umask:
Tuple::One(22),
event_name:
"UNC_CBO_CACHE_LOOKUP.READ_ES",
brief_description:
"L3 Lookup read request that access cache and found line in E or S-state",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_ARB_TRK_REQUESTS.ALL",
IntelPerformanceCounterDescription{event_code:
Tuple::One(129),
umask:
Tuple::One(1),
event_name:
"UNC_ARB_TRK_REQUESTS.ALL",
brief_description:
"Total number of Core outgoing entries allocated. Accounts for Coherent and non-coherent traffic.",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("iMPH-U"),
filter:
None,
extsel:
false,}),
("UNC_CBO_CACHE_LOOKUP.ANY_I",
IntelPerformanceCounterDescription{event_code:
Tuple::One(52),
umask:
Tuple::One(136),
event_name:
"UNC_CBO_CACHE_LOOKUP.ANY_I",
brief_description:
"L3 Lookup any request that access cache and found line in I-state",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_CBO_CACHE_LOOKUP.READ_MESI",
IntelPerformanceCounterDescription{event_code:
Tuple::One(52),
umask:
Tuple::One(31),
event_name:
"UNC_CBO_CACHE_LOOKUP.READ_MESI",
brief_description:
"L3 Lookup read request that access cache and found line in any MESI-state",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_CBO_XSNP_RESPONSE.MISS_XCORE",
IntelPerformanceCounterDescription{event_code:
Tuple::One(34),
umask:
Tuple::One(65),
event_name:
"UNC_CBO_XSNP_RESPONSE.MISS_XCORE",
brief_description:
"A cross-core snoop initiated by this Cbox due to processor core memory request which misses in some processor core.",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_CBO_CACHE_LOOKUP.ANY_MESI",
IntelPerformanceCounterDescription{event_code:
Tuple::One(52),
umask:
Tuple::One(143),
event_name:
"UNC_CBO_CACHE_LOOKUP.ANY_MESI",
brief_description:
"L3 Lookup any request that access cache and found line in MESI-state",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_CBO_CACHE_LOOKUP.READ_I",
IntelPerformanceCounterDescription{event_code:
Tuple::One(52),
umask:
Tuple::One(24),
event_name:
"UNC_CBO_CACHE_LOOKUP.READ_I",
brief_description:
"L3 Lookup read request that access cache and found line in I-state",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_ARB_TRK_REQUESTS.WRITES",
IntelPerformanceCounterDescription{event_code:
Tuple::One(129),
umask:
Tuple::One(32),
event_name:
"UNC_ARB_TRK_REQUESTS.WRITES",
brief_description:
"Number of Writes allocated - any write transactions: full/partials writes and evictions.",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("iMPH-U"),
filter:
None,
extsel:
false,}),
("UNC_CBO_XSNP_RESPONSE.MISS_EVICTION",
IntelPerformanceCounterDescription{event_code:
Tuple::One(34),
umask:
Tuple::One(129),
event_name:
"UNC_CBO_XSNP_RESPONSE.MISS_EVICTION",
brief_description:
"A cross-core snoop resulted from L3 Eviction which misses in some processor core.",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_CBO_CACHE_LOOKUP.ANY_M",
IntelPerformanceCounterDescription{event_code:
Tuple::One(52),
umask:
Tuple::One(129),
event_name:
"UNC_CBO_CACHE_LOOKUP.ANY_M",
brief_description:
"L3 Lookup any request that access cache and found line in M-state",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_CBO_CACHE_LOOKUP.READ_M",
IntelPerformanceCounterDescription{event_code:
Tuple::One(52),
umask:
Tuple::One(17),
event_name:
"UNC_CBO_CACHE_LOOKUP.READ_M",
brief_description:
"L3 Lookup read request that access cache and found line in M-state",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_CBO_XSNP_RESPONSE.HIT_XCORE",
IntelPerformanceCounterDescription{event_code:
Tuple::One(34),
umask:
Tuple::One(68),
event_name:
"UNC_CBO_XSNP_RESPONSE.HIT_XCORE",
brief_description:
"A cross-core snoop initiated by this Cbox due to processor core memory request which hits a non-modified line in some processor core.",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_CLOCK.SOCKET",
IntelPerformanceCounterDescription{event_code:
Tuple::One(0),
umask:
Tuple::One(1),
event_name:
"UNC_CLOCK.SOCKET",
brief_description:
"This 48-bit fixed counter counts the UCLK cycles",
public_description:
None,
counter:
Counter::Fixed(0),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("NCU"),
filter:
None,
extsel:
false,}),
("UNC_CBO_CACHE_LOOKUP.WRITE_ES",
IntelPerformanceCounterDescription{event_code:
Tuple::One(52),
umask:
Tuple::One(38),
event_name:
"UNC_CBO_CACHE_LOOKUP.WRITE_ES",
brief_description:
"L3 Lookup write request that access cache and found line in E or S-state",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_CBO_XSNP_RESPONSE.HITM_XCORE",
IntelPerformanceCounterDescription{event_code:
Tuple::One(34),
umask:
Tuple::One(72),
event_name:
"UNC_CBO_XSNP_RESPONSE.HITM_XCORE",
brief_description:
"A cross-core snoop initiated by this Cbox due to processor core memory request which hits a modified line in some processor core.",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_CBO_CACHE_LOOKUP.WRITE_MESI",
IntelPerformanceCounterDescription{event_code:
Tuple::One(52),
umask:
Tuple::One(47),
event_name:
"UNC_CBO_CACHE_LOOKUP.WRITE_MESI",
brief_description:
"L3 Lookup write request that access cache and found line in MESI-state",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_CBO_CACHE_LOOKUP.WRITE_M",
IntelPerformanceCounterDescription{event_code:
Tuple::One(52),
umask:
Tuple::One(33),
event_name:
"UNC_CBO_CACHE_LOOKUP.WRITE_M",
brief_description:
"L3 Lookup write request that access cache and found line in M-state",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_ARB_TRK_OCCUPANCY.ALL",
IntelPerformanceCounterDescription{event_code:
Tuple::One(128),
umask:
Tuple::One(1),
event_name:
"UNC_ARB_TRK_OCCUPANCY.ALL",
brief_description:
"Each cycle count number of all Core outgoing valid entries. Such entry is defined as valid from it\'s allocation till first of IDI0 or DRS0 messages is sent out. Accounts for Coherent and non-coherent traffic.",
public_description:
None,
counter:
Counter::Programmable(1),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("iMPH-U"),
filter:
None,
extsel:
false,}),
("UNC_CBO_CACHE_LOOKUP.ANY_ES",
IntelPerformanceCounterDescription{event_code:
Tuple::One(52),
umask:
Tuple::One(134),
event_name:
"UNC_CBO_CACHE_LOOKUP.ANY_ES",
brief_description:
"L3 Lookup any request that access cache and found line in E or S-state",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("CBO"),
filter:
None,
extsel:
false,}),
("UNC_ARB_COH_TRK_REQUESTS.ALL",
IntelPerformanceCounterDescription{event_code:
Tuple::One(132),
umask:
Tuple::One(1),
event_name:
"UNC_ARB_COH_TRK_REQUESTS.ALL",
brief_description:
"Number of entries allocated. Account for Any type: e.g. Snoop, Core aperture, etc.",
public_description:
None,
counter:
Counter::Programmable(3),
counter_ht_off:
Counter::Fixed(0),
pebs_counters:
None,
sample_after_value:
0,
msr_index:
MSRIndex::None,
msr_value:
0,
taken_alone:
false,
counter_mask:
0,
invert:
false,
any_thread:
false,
edge_detect:
false,
pebs:
PebsType::Regular,
precise_store:
false,
data_la:
false,
l1_hit_indication:
false,
errata:
None,
offcore:
false,
unit:
Some("iMPH-U"),
filter:
None,
extsel:
false,})]),}