x86::msr::MSR_IFSB_CNTR7
[−]
[src]
pub const MSR_IFSB_CNTR7: u32=
67539
IFSB Latency Event Counter Register (R/W) See Section 18.17, Performance Monitoring on 64-bit Intel Xeon Processor MP with Up to 8-MByte L3 Cache.